I Built a Digital Clock With an Altera MAX II

Writing Verilog in Quartus, untangling jumper wires, and the quiet patience of hardware debugging.

ELECTRONICS

9/21/20262 min read

Most of my time with digital circuits had been purely theoretical—code written on a screen, waveforms plotted in a software simulator, and clean diagrams in lecture slides. But simulation only shows you how things are supposed to work in an ideal world. I wanted to build something tangible, sitting right on my desk, that I could watch tick second by second.

That curiosity led to this project: a standalone digital clock built around an Altera MAX II CPLD board, written in Verilog, and wired directly to a multi-digit display.

From Quartus to Real Hardware

The workflow itself was straightforward, but every step demanded patience. I opened up Quartus, created a new project, and started writing the logic modules in Verilog.

Because the development board runs on a fast onboard crystal oscillator, the first task was writing a frequency divider—essentially a counter that counts millions of high-speed clock pulses down into a single, steady 1-second tick. From there, I wrote the counter logic for seconds, minutes, and hours, along with a multiplexer to cycle through the display digits fast enough that our eyes see them lit all at once.

Once the code compiled cleanly in Quartus, I used a USB Blaster to flash the design into the chip. Then came the tactile part: running rows of jumper wires from the board's header pins directly to the display on my breadboard.

The Late-Night Debugging Log

Hardware has a way of keeping you humble. The first time I plugged in power, the display didn't work the way I imagined—some segments flickered, and pressing a button to set the time caused the numbers to jump erratically ahead.

That was where the real learning happened. Sitting at my desk late at night, I had to slow down and trace each problem one by one:

  • Loose jumper wires: A slightly loose wire on the breadboard meant a whole segment went dark or flickered when touched. Tidying up the wiring made an immediate difference.

  • Button bounce: Mechanical buttons don't close cleanly; they physically vibrate for a split second, tricking the chip into seeing several button presses at once. I went back into Quartus and wrote a small debouncing module in Verilog to filter out the noise.

  • Counter edge cases: Watching the transition from 59 seconds to 00 taught me more about reset conditions and register timing than re-reading any textbook chapter.

Objects in a personal studio should grow more distinguished with use rather than looking worn out. Solid wood surfaces and natural linoleum develop subtle patinas over years of intense project deadlines and late-night sessions, leaving quiet evidence of long-term work.

What I Learned Along the Way

When the clock finally ran steadily on its own—ticking smoothly from minute to minute on my desk—it felt completely different from seeing a simulation waveform turn green.

There is a quiet satisfaction in writing code in Quartus, loading it into physical silicon, and watching real components respond in front of you. It is a simple build, but it was my first real step from software theory into hands-on hardware.

The Bench Loadout

Tools Behind This Build:

Gear I'm Exploring:

  • USB Logic Analyzer (8-Channel): A small diagnostic tool I’ve been researching to help visually inspect digital signals and timing lines directly on a laptop screen.

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